<The main memory of the DEUCE was built form mercury delay lines of 1024
<bits, and the 1024 bit shift register chip had just become available.
<The connection was obvious and we spent hours discussing the rebuilding
<a TTL version of DEUCE, for which he still had the logic diagrams. Alas
<the project was never completed but I have dreams of doing it one day.
With current parts the Turing machine could almost be practical/useful as
it would be easy to provide enough memory to simulate a very long tape
and enough speed to transverse it quickly.
It's been a long time since I've looked at that machine.
<Take the idea even further : the technology exists today to build most
<if not all first generations machines on a single chip. Indeed I wonder
<if an FPGA might not be able to be reconfigurable to build many of these
In most cases yes. Some are quite simple when reduced a logical
description. The PDP-8 has seen this treatment many times using the 6100.
6120 and even gate-arrays.
Allison
Received on Thu Nov 20 1997 - 10:53:13 GMT