front panels

From: Allison J Parent <allisonp_at_world.std.com>
Date: Tue Feb 24 20:57:52 1998

<But what does an instruction do? It just generates bus cycles, right?
<The bus doesn't care whether those cycles come from the CPU or something
<else (unless there's bus mastering and arbitration, which I doubt).

In theory your correct.

<The difference between generating a memory cycle and and I/O cycle on an
<Intel CPU is simply a matter of clocking a different value onto the
<"control bus" (which might be a multiplexed bus, I don't know the 8080
<that well).

Reducing that to practice and at a low cost on S100 bus with an 8080 is a
different matter. To understand that you need to know both as S100 was
not a bidirectional data bus(seperate data in and data out paths) and
all the bus control signals were RAW 8080 status/controls making it a
royal pain to do DMA on the bus. To make a point to do a memory write
on the bus you have to output SWO/, PWR/, MWRITE, SMEMR, SOUT, SINP,
PDBIN and all of them must be in the correct state (some are active
high!). S100 was a poorly designed bus in that respect. I may add that
Altair 8800(a) and Imsai were not bus masters, they were more CPU control.
The best way to descrive this is if the CPU was Not there the front panel
was an ornament.


Allison
Received on Tue Feb 24 1998 - 20:57:52 GMT

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