TI 4060 RAM

From: Allison J Parent <allisonp_at_world.std.com>
Date: Mon May 18 21:14:14 1998

<> Wasn't it the DRAM used on the infamous MITS 4KB DRAM S-100 memory card
<> The one that never worked because they used a one-shot for the RAS-CAS
<
<Hmm.. I doubt it. The 4060 doesn't have separate RAS and CAS inputs and a
<multiplexed address. There were 16 pin 4K DRAMs that did, though.

It was used for the 88-s4k and the earlier 88-MCD both were cranky
designs as the S4K didn't like z80s and the MCD was just flakey
due to sloppy timing and board level noise.

<> timing. That was one collector item that should be put in a landfill.

Those two memories were best left in the dumpster. The rams used were
easy to work with as they only needed a CE to latch the address and cause
a read, write or refresh. They were at the time fairly fast as well
which is where some designers got burnt from the noise that was generated
by the fast switching.

<As I keep on telling people "I'll not show you how to use {one shots |
<monostables}. By the time you know how to use them correctly, you can
<figure out how to use them without my help" :-)

Oneshots are ok but, critical timing and cascaded timing is nuttyness
when combined with board level noise. The Altair boys used oneshots to
solve timing problems when combinational logic was more correct. The
problem was even the s4k was plagued by board level noise and strange
decodings.

Allison
Received on Mon May 18 1998 - 21:14:14 BST

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