> I wonder if bit-serial would be simpler (less data path, more control
> logic, basically). A lot of the valved machines were bit-serial for this
> reason.
> [...]
I doubt that. shure, you might save logic within the ALU, but when
it comes to registers and other buffers, you need them again in paralell
and the additional logic, at least at the simple structure of the Muniac
CPU, will rather incease the tube count. I spend some a lot time to find
ways to make it simplier, but John did a marvelous job.
> > Am amazed you couls build a computer like this with ~400 cards ~800 tubes.
> > That is similar to building a complete computer with 200 SSI TTL chips like
> > a 7400. Especially since a 24 bit latch could use 24 of the cards. I tried
> This doesn't sound out of line. The CPU of the PDP8/e on my desk is 3
> quad cards of TTL, mostly simple gates. Perhapes 250chips total. OK, some
> of them are more complex (like full adder circuits), but there's nothing
> that big in there.
> > a design once (on paper) with MSI ic's like 74193 counters, and it quickly
> > got out of hand, 100's of ic's.
> If you're going to allow anything in the TTL data book, then you can
> trivially make a CPU in 200 chips. You have to cheat slightly (74181
> ALUs, small PROMs, etc), but it can be done. It has been done - many times.
Even if you stay at the more 'simple' structures (maximum complexity
is a 4 bit latch) you can still be way below 200 - maybe only 100
TTLs - you just have to be as simple as possible. And the Muniac
CPU is _very_ down to the basics (but still powerfull and usable).
My imagination of the design is an early atempt to create a
computer for 'Lab-Automatisation' (did someone say PDP ? :)
Gruss
H.
--
Ich denke, also bin ich, also gut
HRK
Received on Mon Feb 01 1999 - 04:34:30 GMT