Glenatacme_at_aol.com wrote:
> In a message dated 7/22/99 9:57:34 PM Eastern Daylight Time,
> allisonp_at_world.std.com writes:
>
> > Despite all this my knowledge of what a transputer is hasn't greatly
> > improved. It would be interesting to have a discussion as to it's
> > archetecture and all.
> >
> > Allison
>
> I agree. Can those of you who are intimate with this hardware please
> enlighten those of us who are not? This stuff sounds pretty cool but without
> more information it's rather hard to tell . . .
>
I can give you a basic run-down, but I suggest you read the specs on my webpage
as it gives detailed info on each type of chip. I also suggest you take a look
at
the "Transputer Assembly Language" book as it also has a lot of info on
transputers.
Here are the URLs:
The Transputer HomePage -
http://www.geocities.com/SiliconValley/Heights/1190
Transputer Assembly Language Programming -
http://www.teleport.com/~johnro/transputer/transputer.htm
C Programming on the Transputer -
http://cs.smith.edu/~thiebaut/transputer/descript.html
The transputer architecture -
http://www.ludd.luth.se/~warg/projects/transputer.html
Here is Sundance's description:
The transputer is a high-performance RISC processor with its own internal and
external memory. In addition, each unit has 4 communication links designed for
high speed communication with other transputers. The communication links allow
organizing the transputers into a linear array, ring, mesh or a custom
configuration. The link configuration is specified by a network information file
at program load time. Although logically they can be connected in many different
ways, there must always be a link provided for the boot channel. The boot
channel provides a reset and startup control for each transputer. Since only one
boot channel output can be connected to one boot channel input, the practical
effect is that for startup the channels are physically connected in a linear
array. Note that since the boot channel can tie up two of the four channels,
there are still two channels which are free for other connections. In addition,
the boot channels can be used for regular communications after startup. Within
this limitation other configurations can be achieved by using the non-boot
channels.
Ram
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Received on Fri Jul 23 1999 - 07:43:19 BST