More on "discrete" CPUs

From: daniel <daniel_at_internet.look.ca>
Date: Fri Oct 22 16:04:27 1999

-----Original Message-----
From: Chuck McManis <cmcmanis_at_freegate.com>
To: Discussion re-collecting of classic computers
<classiccmp_at_u.washington.edu>
Date: Friday, October 22, 1999 3:24 PM
Subject: More on "discrete" CPUs


>Having read through the discussion, I sat down and sketched out some "flip
>chip" type designs. Units of logic that could be wired together to create
>the CPU. When I did this I was striving for a fairly universal design so,
>as John put it, we could have a whole bunch made and get the benefit of
>volume manufacturing.

Good stuff Chuck. The only other idea I have is if we can standardize 4
SMALL boards and just
put them on one larger sheet they can be cut after they are manufactured
(which eliminates the double connector).

Gotta resolve yet which CPU to build (UNIVAC, PDP 8, whatever) and the
standard circuits... (quad flip flop, whatever).

To keep it small, bit-serial cpu, light bulbs :-) , flip switches and .....
?



>
>Well, not too suprisingly (ask the right question, get the same answer) I
>was about halfway through my sketched out design when I realized I was
>duplicating something I had seen in a databook, a Xilinx databook to be
>precise.
>
>The flip chips are the "CLB"s (Complex Logic Blocks) of your standard gate
>array design. The backplane is the interconnects.
>
>The problem is reduced to the complexity of implementing the FPGA
>architecture and then having the tools send out wrap lists rather than
>routing configs :-)
>
>--Chuck
>
Received on Fri Oct 22 1999 - 16:04:27 BST