gauging interest in VAX 6000-530
On or about 07:56 PM 10/24/99 -0700, Mike Cheponis was caught in a dark
alley speaking these words:
>That's fascinating. Take obsolete hardware and architecture (vax), and
>keep them running! I guess I will never cease to be amazed at the weird
>things people do. Heck, I heard the other day that people are -still-
>running 1401 emulation mode under a VM/360 simulator on their modern h/w!
The last three places I worked for (or heard of thru the grapevine) were
running mostly System 36 RPG apps in emulation on their AS/400 hardware...
it's more common than you might think!
>> Its not the speed
>>of the individual bus, but its the number of busses.
>
>That's of course bull.....
You crack on others for stating things without backing up with actual
data... where's yours? My wife's box is a Pentium 100 running SCSI3Wide and
I did benchmarks (real-world... but don't have them handy) which showed
that box stomped a Pentium 166 / IDE. (Mind you, saying the IDE bus is
rather an oxymoron, as it's an extension of the ISA bus IIRC... :-)
The difference? The IDE bus is totally stupid (read: CPU controlled)
whereas the SCSI bus is very smart (read: 80Mhz RISC CPU controlled) - the
SCSI controller is offloading most of the CPU overhead.
Despite all this, the mouse driver on it right now sucks wind, and can lock
the entire machine for over 3 seconds... bad driver/bus design. That's
something the PC world will prolly never get rid of.
Tho I've never seen, touched, smelled a Vax, I've seen other DEC hardware
(yes, even a 3-CPU 486DX33) that use sub-controllers for all of their I/O,
and they handled lots of multiple users wonderfully, and if one I/O
controller goes south, the equipment is designed to continue with minimal
heartburn.
>>The more busses, the more parallelism and the less waiting.
>
>-IF- the speed of the busses is high enough!
And one bus cannot affect another bus...
>>One
>>fast bus works well until you want to do multiple things, and
>>then it quickly becomes a bottleneck.
>
>Excuse me? Could you please back up this assertion with data? After all,
>at -some- point, all these busses have to get their data into/out of the CPU,
>right? And -that- is a "bottleneck" for sure... (Sure, you can have
>channel-to-channel I/O, but most aps are not just shuffling bits.)
The busses don't *have* to route their data thru the CPU (erm... unless
it's the IDE bus...) if it's headed for memory - that's what DMA is for. A
good DMA setup (which the PC doesn't have) can offload even more work from
the host CPU, allowing it to do useful work instead of playing "data
traffic cop."
As always, YMMV, IMHO, and all that jazz,
Roger "Merch" Merchberger
=====
Roger "Merch" Merchberger -- zmerch_at_30below.com
SysAdmin - Iceberg Computers
===== Merch's Wild Wisdom of the Moment: =====
Sometimes you know, you just don't know sometimes, you know?
Received on Mon Oct 25 1999 - 00:39:26 BST
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