Tim's own version of the Catweasel/Compaticard/whatever

From: CLASSICCMP_at_trailing-edge.com <(CLASSICCMP_at_trailing-edge.com)>
Date: Tue Jul 4 12:11:20 2000

>For quite some time I've tried to persuade Eric Smith, who's quite
>knowledgable about programming the SCENIX SX processor, to write some
>firmware that would create, functionally, a FDC chip out of one of these
>ultra-fast single-chippers.

"Better" is the enemy of "good enough". If I can throw something together
in an afternoon out of TTL chips from Radio Shack, why go to the effort of
creating what amounts to a custom chip?

Maybe my priorities are too much on the "just do it" side, and not enough
on the "do it Dick's way" side :-).

>Interpreting it in light of the modulation, data format, data rate, etc, is
>quite involved, but certainly achievable, though someone has to undertake to
>write the code with which to accomplish this.

The code obviously varies depending on the encoding method, but my method -
a completely public circuit design with easy interface to a wide variety
of computers - allows the user to write the decryption code in whatever he/she
might be familiar with on whatever platform he/she wants.

> Having the entire diskette
>sampled as has been suggested, a track at a time means that one's computer
>can, at its own pace, reduce, interpret, reformat, etc, the data prior to
>writing it to a duplicate. The reformatting of the data into its original
>format offers the advantage of phase coherency between sectors so the PLL on
>the controller doesn't have to shift phase between sectors. That will make
>the job easy in a case where the PLL has, over time, drifted off its nominal
>data rate.

??? There is no need for a hardware PLL if you oversample by a factor of a
few.

>There are, IIRC, 10416 byte-times, nominally in an 8" FD track at MFM. at
>16x ovrsampling, that's a fair amount of data.

That's absolutely true. But RAM chips are fairly cheap these days, and I took
advantage of that in my design.

> While there are a number of
>256Kx8 SRAMS out there, they're not likely to be lying in the corner unused.

I used an ISSI 62C1024-7, a 128K*8 70ns 32-pin DIP, and it's good enough
for me. Cost was $12.00. Looking in my Digi-Key catalog, it seems you can
get 512K*8 parts for about $15.00 today, but they're in TSSOP's which aren't
so quickly breadboarded for me. (Though they are the obvious solution
if you transfer my design to a PCB layout.)

I'm sure a fair number of people on this list have access to unused 486
motherboards with socketed cache RAM parts in the 32K*8 to 128K*8 range.
These oughta do fine too.
  
>I recommend, therefore that such a circuit be devised with DRAMS.

Again, "better" is the enemy of "good enough". I made my circuit
with parts that were easily available to me, and I decided that it
wasn't worth the effort to build a DRAM controller when SRAM is so
cheap. (And SRAM kept the parts count down, too...) You obviously
have different priorities.

-- 
 Tim Shoppa                        Email: shoppa_at_trailing-edge.com
 Trailing Edge Technology          WWW:   http://www.trailing-edge.com/
 7328 Bradley Blvd		   Voice: 301-767-5917
 Bethesda, MD, USA 20817           Fax:   301-767-5927
Received on Tue Jul 04 2000 - 12:11:20 BST

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