Tim's own version of the Catweasel/Compaticard/whatever

From: Eric J. Korpela <korpela_at_ellie.ssl.berkeley.edu>
Date: Thu Jul 6 09:19:14 2000

> I have to take exception to your suggestion of making a modified version of
> your FPGA to generate test points. There are lots of flops in an LCA and
> limited routing resources.

I agree here. My practice has been to route the design without the test
points and then use the low level editor to add what test points I could
without changing the layout/routing. Of course then you can't count
on the signal you wanted to test on being there and being routable to a
IOB. It's definitely a different world than 74 series logic.

Received on Thu Jul 06 2000 - 09:19:14 BST

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