Toggling in PDP-11 Bootstraps...

From: Pete Turnbull <pete_at_dunnington.u-net.com>
Date: Tue Mar 21 15:57:49 2000

On Mar 21, 11:09, Aaron Christopher Finney wrote:
>
> Does anyone have any practical advice concerning this, something that
> might save me a little time/frustration?

At least to start with, I'd ignore the MSCP stuff and play with the 11/73
and RXV21. It's easier to see what's going on, since you can single-step
and look at the RXV21 registers; MSCP is a relatively complex protocol
which uses command buffers in memory, and the registers won't tell you
much.

> I'd like to be able to set up the simplest system possible and try to
> toggle in a bootstrap. I've played with the ones on metalab (RX01, MSCP)
> without much real success so far. Trying to boot from the RX01's using
the
> bootstrap code on metalab results in the drive access light coming on,
but
> nothing else happening. Sending a break stops at 1044 every time, the
> contents of that register is 1776. Trying to boot from the Dilog scsi
> device #0 (should be DU0, right?) just hangs (again using the MSCP
> bootstrap on metalab). The MSCP bootstrap is well-commented, so I can see
> what's going on there...a little hint or push may be all I need to be
able
> to modify it to work for me. The RX01 bootstrap is not commented at all,
> unfortunately.

An RXV21 (RX02) bootstrap is different from an RXV11 (RX01). Below is one
for an RXV21. I also have quite a few little routines to do things like
echo to the console, test/size RAM, dump memory, find CSRs, do serial port
loopback tests, etc; all small enough to enter using ODT. Mail me if you
want any...

     1 000000 ; RXV21_boot From Microcomputer Interfaces
Handbook 1983-84, page 484
     2 000000 ; Use ODT to enter, then set RS=340,
R6=1000, R7=1000, then P
     3 000000 ;
     4 000000 ORG O1000
     5 001000 ;
     6 001000 012700 MOV #O100240,R0
     6 001002 100240
     7 001004 012701 MOV #O177170,R1 ; RXCSR
     7 001006 177170
     8 001010 005002 CLR R2
     9 001012 012705 MOV #O200,R5
     9 001014 000200
    10 001016 012704 MOV #O401,R4 ; track 1,
sector 1
    10 001020 000401
    11 001022 012703 MOV #O177172,R3 ; RXDBR
    11 001024 177172
    12 001026 030011 BIT R0,(R1)
    13 001030 001776 BEQ $-4 ; wait for
TransferReq or Done
    14 001032 100437 BMI O1132 ; branch if
ERR set
    15 001034 012711 MOV #O407,(R1) ; set DDens,
Read, Go
    15 001036 000407
    16 001040 030011 BIT R0,(R1) ; wait for TR
    17 001042 001776 BEQ $-4
    18 001044 100432 BMI O1132 ; branch if
ERR set
    19 001046 110413 MOVB R4,(R3) ; give sector
number
    20 001050 000304 SWAB R4 ; swap track
and sector
    21 001052 030011 BIT R0,(R1) ; wait for TR
    22 001054 001776 BEQ $-4
    23 001056 110413 MOVB R4,(R3) ; give track
number
    24 001060 000304 SWAB R4 ; swap sector
and track
    25 001062 030011 BIT R0,(R1) ; wait for TR
    26 001064 001776 BEQ $-4
    27 001066 100421 BMI O1132
    28 001070 012711 MOV #O403,(R1) ; EmptyBuffer
(DDens) command
    28 001072 000403
    29 001074 030011 BIT R0,(R1) ; wait for TR
    30 001076 001776 BEQ $-4
    31 001100 010414 MOV R4,(R4) ; save sector
number
    32 001102 010513 MOV R5,(R3) ; set word
count=256
    33 001104 030011 BIT R0,(R1)
    34 001106 001776 BEQ $-4 ; wait for
done
    35 001110 100410 BMI O1132
    36 001112 010213 MOV R2,(R3) ; set
address=0
    37 001114 060502 ADD R5,R2 ;
increment...
    38 001116 060502 ADD R5,R2 ; ...address
    39 001120 122424 CMPB (R4)+,(R4)+ ; bump R4 by
2 and clear all flags
    40 001122 120427 CMPB R4,#3 ; sectors 1
and 3 get done
    40 001124 000003
    41 001126 003735 BLE O1022 ; loop if not
finished
    42 001130 012700 MOV #0,R0
    42 001132 000000
    43 001134 005007 CLR PC ; go to
address zero
    44 001136 120427 CMPB R4,#0 ; dummy
operation, pipelined but not executed
    44 001140 000000

-- 
Pete						Peter Turnbull
						Dept. of Computer Science
						University of York
Received on Tue Mar 21 2000 - 15:57:49 GMT

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