Monitor for iSBC 8024

From: ajp166 <ajp166_at_bellatlantic.net>
Date: Sat Nov 4 20:10:59 2000

>I'm not including internal temporaries that are not
>exposed in any way either. But depending on how your
>hardware is wired, the NMI edge detect flop can have
>substantial influence on how you write your interrupt
>handler. Thus it is in fact programmer visible, though
>not as much as e.g. the Z-80's R register.


It is a feature as they say. I like to use it for a RTC
heartbeat as you bang it with and edge. Hard to use
for CP/M as it hits the default FDB.


Z80 is as feature rich a cpu one could ask for at that time
or since. Z180 and all added some nice touches.

I happen to like the 8085 for mid sized tasks that are too
big for 8048/9 but Z80 may not fit as well. SIN/SOUT and
the four RST{5.5, 6.5, 7.5,TRAP) lines are handy for
some things. THose interrupts and IO lines offere more
than most minimal z80 systems without Zilog peripherals.
The 8085 is often forgotten despite being a decent chip.


Allison
Received on Sat Nov 04 2000 - 20:10:59 GMT