Counting cycles, was:( Re: Processor balance ... )

From: JimD. <jpdavis_at_gorge.net>
Date: Fri Nov 17 08:15:50 2000

Hi,
Those who think that instruction cycle time counting, memory and
i/o latency considerations are an anachronism haven't be exposed
to processors like the IXP-1200 from intel. These little monsters
force the programmer to consider the timing of every instruction
and the delays inherent in most memory accesses. This chip has 7
processors. A strongArm core and 6 microengines, each capable of
running 4 threads, with 1K of instruction memory / microengine.
It drives gigibit I/O for internet and telecom applications.
Here I am, 15 Years later, counting cycles and instructions again.
Just like the good old days.

Jim Davis.

Neil Cherry wrote:
>
> Eric Smith wrote:
> >
> > Sellam Ismail wrote:
> > And in those days many a clever programmer derived an immense
> > intellectual satisfaction from the cunning tricks by means of which
> > he contrived to squeeze the impossible into the constraints of his
> > equipment.
> > -- Edsger W. Dijkstra, "The Humble Programmer",
> > 1972 ACM Turing Award Lecture
> >
> > He was writing about the very early days of computer programming, when
> > every computer was unique. In these days of bloatware, there are very
> > few programmers that still practice the art of achieving the maximum
> > results from the minimum system (hardware and software). But those of
> > us that do so *still* derive "an immense intellectual satisfaction". :-)
> >
> > Eric
>
> Hey there are still those of use who have managed to write an asm prog
> for a PIC based Cheese box in less than 50 bytes!
>
Received on Fri Nov 17 2000 - 08:15:50 GMT