----- Original Message -----
From: "Peter C. Wallace" <pcw_at_mesanet.com>
To: <classiccmp_at_classiccmp.org>
Sent: Friday, December 14, 2001 2:19 PM
Subject: Re: MITS 2SIO serial chip?
> On Fri, 14 Dec 2001, Richard Erlacher wrote:
>
> > Horsefeathers! The reason they did all the stupid stuff they (IBM) did was
> > because INTEL told them to, since there was nobody on the PC team smart
enough
> > to design a microcomputer, yet dumb enough to risk doing it in their (IBM's)
> > corporate environment. ISTR that the original cause for the presence of the
> > 8255 was the need for it in the parallel port (see the comments in the
original
> > BIOS listings in the tech ref).
>
> Fishfeathers! I stand by my original post. whether Intel helped create the
> mess or not is immaterial...
>
Nobody, including the dumbest at IBM, was dumb enough to use the high-level,
positive edge-triggered interrupt without pressure from Intel. Apparently Intel
had ONE guy at some time in history who devised that ridiculously stupid
approach to interrupt processing and built it into their "scheme" which was
followed by a series of devices that lived on that scheme. Once they had it,
they were stuck with it.
>
> > The 8250 was a fine chip for the application, though I wonder why they used
the
> > DIP version.
>
> What other 8250 option than 40 pin DIP was available in 1981?
>
PLCC-44
>
> There were better choices available, but they didn't want to lose
> > the serial port board business by putting two of them on the same card, and
by
> > that time serial I/O chips tended to have between 2 and 8 ports on them.
>
> Nonsense, What 8 port chips were available in 1981? Were there even any
> 2 port chips for the Intel bus?
>
dual: Signetics 2681/68681, Z80 DART would have worked fine too, with the
exception that the Intel bus didn't work with the "mode-2" interrupt, which you
weren't require to use; octal: TCM78808 which looked pretty much like 8 2661's.
I didn't like the package.
> >
> > Dick
> >
> > ----- Original Message -----
> > From: "Peter C. Wallace" <pcw_at_mesanet.com>
> > To: <classiccmp_at_classiccmp.org>
> > Sent: Friday, December 14, 2001 12:28 PM
> > Subject: Re: MITS 2SIO serial chip?
> >
> >
> > > On Fri, 14 Dec 2001, Gene Buckle wrote:
> > >
> > > > > NS* did use them as did many others. The worst chip was
> > > > > the 8250.
> > > >
> > > > Which makes me wonder what possessed IBM to pick it for the PC.
> > > >
> > > > g.
> > >
> > > The same reason they chose active high edge triggered interrupts on the
> > > bus (wrong on both counts)
> > >
> > > The same reason they used 8 bits of an 8255 to read the KB shift register
> > > that had a (unused) tri-state
> > >
> > > The PC = A horrible, amateurishly designed kluge
> > >
> > >
> > > Peter Wallace
> > >
> > >
> >
> >
>
> Peter Wallace
> Mesa Electronics
>
>
Received on Fri Dec 14 2001 - 16:36:56 GMT