MITS 2SIO serial chip?

From: Richard Erlacher <>
Date: Sun Dec 16 21:28:54 2001

I think there are still some real misconceptions about the relative speeds of
the 6502 and Z80. I used both for years; the Z80 as a tool and the 6502 for all
my controller designs, etc, up to a point. I found the 6502 to be easier to
apply, and, at a 4:1 clock ratio with the Z80 a 4x the 6502, somewhat faster.
Now, if the two were matched at the same memory bandwidth, that having been the
most cost-sensitive factor back in those days, I don't know exactly how that
would have worked out. I think it might have given the Z80 and edge. Coming up
with a fair and general test might be difficult.

I do know one thing, though. It was much less costly to build a fast system
with a 65C02 than with a Z80. First because, at the time, there were no truly
fast Z80's, while there were NMOS 6502's that I used at somewhat upwards of
their rated 4 MHz, which would run RINGS around any Z80 commercially available
in 1979.

The Z80 itself wasn't a bad CPU, but the peripheral set they built for it, with
its compromises in favor of the mode-2 interrupts meant that you couldn't use
wait-states on I/O cycles or on device chip selects to adjust the CPU to the
slower peripherals because it had to be looking over the CPU's shoulder to catch
the interrupt acknowledge and the RETI instruction. I've recently worked this
out by switching the clock rate during I/O and during a pending or current
interrupt, but it's still a PAIN! What's more, it seems to require more than
just a PAL. Handshake logic from a 4-bit wide FIFO (16 pins) seems to be the
tool for keeping track of interrupts and their dismissal.

more below ...


> More like 1.2 MHZ 6502. But with the stupid pre-fetch buffer,
> nobody knows how slow an instruction can be, they just give you the
> best case.
although no matter how slow it is with the prefetch queue, it would be slower
without it.
> --
> Ben Franchuk --- Pre-historic Cpu's --
Received on Sun Dec 16 2001 - 21:28:54 GMT

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