MITS 2SIO serial chip?

From: Cameron Kaiser <spectre_at_stockholm.ptloma.edu>
Date: Thu Dec 20 10:24:31 2001

> What happens if you look at the M1 cycle as 2 Z80 memory cycles (2 wait
> states). Now memory speed is the same for both but not the clock rate.

But even with this artificial concept, the 6502 is still running through
instructions in fewer average clock cycles. Granted, the Z80 has a good
selection of more complex instructions that take fewer clock cycles than
the equivalent 6502 code in total. How often they get employed for this
advantage, however, directly affects their run-time impact of course.

-- 
----------------------------- personal page: http://www.armory.com/~spectre/ --
 Cameron Kaiser, Point Loma Nazarene University * ckaiser_at_stockholm.ptloma.edu
-- In memory of Douglas Adams -------------------------------------------------
Received on Thu Dec 20 2001 - 10:24:31 GMT

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