6502/Z80 speed comparison (was MITS 2SIO serial chip?)

From: ajp166 <ajp166_at_bellatlantic.net>
Date: Sun Dec 23 18:40:43 2001

Cp/m page zero was not required for the os functionality
only commonality. The best worst example was the
TRS-80 version that had page zero relocated +16k higher
to allow for the fixed rom, keyboard and video IO.

The aspects of CP/M that would work for a 6502 (or any cpu)
are the dynamic filespace allocation and the standized IO
interface (BIOS) concept. there are other aspects but the
file IO and system IO concepts were the strong points.

Ah, and you found the hidden register bug in the z80.
You can select either absolutely but, you cannot know
which was in use save by some arcane test procedure.
Works ok if your building software and enforcing a
protocal for use but a multitasking OS where random
routines may use one of the other is a mess.

-----Original Message-----
From: Richard Erlacher <edick_at_idcomm.com>
To: classiccmp_at_classiccmp.org <classiccmp_at_classiccmp.org>
Date: Sunday, December 23, 2001 4:15 PM
Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)

>For some time I've occasionally contemplated a translator from 8080
syntax to
>6502, just for mental masturbation. I don't consider the Z80 a worthy
>for such translation/emulation because half its internal resources are
>accessible via the most extreme of artifice. (It has a redundant
register set,
>at considerable cost, yet doesn't seem to have any way of telling the
>software which of the two sets it's using.) It wouldn't be terribly
>to assign register space to the 6502 zero page in locations
corresponding with
>some not used by CP/M on the 8080. That might prove an interesting way
to cook
>up a useable OS for the 6502.
>----- Original Message -----
>From: "Pete Turnbull" <pete_at_dunnington.u-net.com>
>To: <classiccmp_at_classiccmp.org>
>Sent: Sunday, December 23, 2001 5:21 AM
>Subject: Re: 6502/Z80 speed comparison (was MITS 2SIO serial chip?)
>> On Dec 22, 4:44, Ben Franchuk wrote:
>> > Richard Erlacher wrote:
>> > >
>> > > Let's leave compilers out of the equation. Even the same small-C
>> compiler,
>> > > targeted at the two quite different CPU's potentially represent a
>> significant
>> > > skew in favor of one or another of the two.
>> > >
>> > How can you have skew? That is the whole idea of benchmark is to
>> > compare
>> > two machines. I would expect that the simple C that was given would
be a
>> > good test
>> > when judged with other benchmarks.
>> For a comparison of two development systems, maybe, but not for a
>> comparison of processors. You'll find that the compilers were written
>> differently for the different processors. As likely as not, one will
>> better at certain things than another, or better on one processor.
>> For example, gcc does fairly poorly on a PDP-11 or an SGI machine
(SGI's cc
>> will run rings round gcc for MIPS in almost every respect) yet works
>> well on an x86 achitecture, because that's where the major development
>> done. If you take a compiler written for one chip, say a Z80, a
>> port will produce poor code for a 6502 because you have to think about
>> things in a different way, and this will be more apparent with a
>> compiler than sophisticated one.
>> --
>> Pete Peter Turnbull
>> Network Manager
>> University of York
Received on Sun Dec 23 2001 - 18:40:43 GMT

This archive was generated by hypermail 2.3.0 : Fri Oct 10 2014 - 23:33:41 BST