It's not entirely clear what's meant here, but if he means that the MMI
16-X/R/L/whatever series is all that he's including among his definition then
it's likely he's right. The notion that the process for generating MMI PALs was
any simpler than for other mfg's devices, he's reciting the party line and
nothing resembling the truth, as PALs also require logic equations and
programmers, software, etc, dedicated to the task.
FPLA's were later thought-of as SUPER-PALs, since they had both programmable AND
arrays and programmable OR arrays. This was probably too much for some
designers, but not for all of them. As I said, it reflects the party line more
than reality. That was his job.
Dick
----- Original Message -----
From: "Peter C. Wallace" <pcw_at_mesanet.com>
To: <classiccmp_at_classiccmp.org>
Sent: Wednesday, December 26, 2001 10:35 AM
Subject: PAL introduction (was MITS 2SIO serial chip)
>
> The PAL was introduced in 1978, Other types of programmable logic devices
> were available earlier, (FPLA's for example)
>
> Here is a quote from one of the PAL's inventors (Andy Chan -- now at
> QuickLogic)
>
> "MMI's PAL was designed to overcome the problems associated with FPLA that
> made it difficult for end users. A proprietary programmer was necessary
> and a cumbersome inputting process (creating the design in Boolean
> equations, translating them into a bitmap and typing that into a machine
> that generated a paper tape for the programmer to read) meant that if the
> design didn't work, it was impossible to know at what step something went
> awry. Our PAL was faster and used less power, but the main improvement
> was in its ease of use, Chan said, noting that the first PAL chip was
> introduced in 1978."
>
>
>
> PCW
>
>
>
>
Received on Wed Dec 26 2001 - 22:23:35 GMT