2116 and other old memory chips

From: Richard Erlacher <edick_at_idcomm.com>
Date: Sat Jul 7 19:53:41 2001

SRAMs were smaller in size, and simpler in architecture, though the elemental
memory structures were larger. The fast SRAMs were built for access time, at
the cost of power, mostly, aside from the die size. DRAMs were built for
capacity (number of bits) and density (pounds of silicon per bit) which
translated into cost. Slower SRAMs were built for simplicity of operation, as
there was always a market for devices that could be applied without a large
hardware overhead. DRAMs were built for the applications that justified a
larger overhead since there was a demand for large memory size in a limited
power, space and cost budget. SRAMs in small arrays were much cheaper as well
as being simpler.

Dick

----- Original Message -----
From: "Vance Dereksen" <vance_at_ikickass.org>
To: <classiccmp_at_classiccmp.org>
Sent: Saturday, July 07, 2001 5:20 PM
Subject: Re: 2116 and other old memory chips


>
> Is that also why static RAM is so much faster?
>
> Peace... Sridhar
>
> On Sat, 7 Jul 2001, Tony Duell wrote:
>
> > > This answers most of my questions, thanks. One further question. What
> > > is the difference between "static" ram and "dynamic" ram, since both
> > > are "volatile" ram? Or, putting it another way, what is "static" about
> > > "static" ram, since it changes as well?
> >
> > OK...
> >
> > Static RAM is made from flip-flops. Which means that when you write data
> > to it, you set some flip flops one way (for '1's) and some the other way
> > (for '0's). And the flip-flops remain in that state until either you turn
> > the power off or you write some other data to it.
> >
> > Dynamic RAM is made from capacitors. Generally, a '1' is represented by a
> > charge on a capacitor, a '0' is a discharged capacitor. Writing data to
> > DRAM involves charging some capacitors and discharging others.
> >
> > The problem is that all electronics has leakages. So the capacitors
> > discharge themselves (in a few milliseconds). So you have to read each
> > location periodically and write the data back again to 'refresh' the
> > charge on the capacitors. Most (all?) DRAMs have internal circuitry to
> > help with this (e.g. accessing a particular location will refresh a
> > number of locations -- perhaps all those with the same pattern in the
> > high-order half of the address). But you still have to do something -- on
> > 'classic' DRAMs, you have to cycle the address inputs and apply RAS/
> > pulses (or at least that's the normal way). If you don't, you lose data.
> >
> > That's the difference. The contents of static RAM are maintained as long
> > as power is applied. Dynamic RAM needs to be refreshed or it will forget.
> >
> > -tony
> >
>
>
Received on Sat Jul 07 2001 - 19:53:41 BST