How many transistors in the 6502 processor?

From: Dave McGuire <mcguire_at_neurotica.com>
Date: Fri May 4 12:23:33 2001

On May 4, Richard Erlacher wrote:
> My first prototype of my all-digital clock-data separator circuitry was
> wire-wrapped and operated nicely at 80 MHz. The speeds mentioned by Emanuel are
> certainly realistic, and certainly not the upper end of what was done with
> wire-wrapped high-speed logic.

  I have to agree with Richard here. Back in 1986/87, I worked on the
Navier-Stokes Supercomputer project at Princeton University...the
prototype processors for that machine were wire-wrapped (most of the
boards by me! 8-)) and signals ran between 20-30MHz. We had no
problems at all. We used twisted-pair wiring for some of the clock
lines as I recall, but the vast majority of the wiring was simple
point-to-point wirewrap with no special routing considerations of any
kind.

  Don't knock wire-wrapping...it's fast, easy, works very well, and
properly done and cared for, it will last for years. And if you're a
weirdo like me (and I know some of you are) it can even be FUN! 8-)

  As an interesting side note, that supercomputer (the project is
still underway from what I'm told, undergoing various refinements to
keep pace with advancing technology) is built on Unibus-form-factor
boards, using PDP11/24-style expansion chassis. It was a cheap and
easy way to get nice, compact chassis with high-quality power supplies
and very well-known (and large) board geometries.


              -Dave McGuire
Received on Fri May 04 2001 - 12:23:33 BST