Hello -
I don't have your email address. So, do you still have the schematics
of your 2901C version of the z80? Have you done any stack based cpu's
with bit slice chips? (e.g. something to run native forth code on )
john
jott_at_hamming.ee.nd.edu
On Fri, May 04, 2001 at 07:13:46AM -0400, ajp166 wrote:
> From: jpero_at_sympatico.ca <jpero_at_sympatico.ca>
> > From: Brian Chase <bdc_at_world.std.com>
> >
> > And then it'd be rather fun to implement your very own 6502 using 74*
> > series logic chips.
>
> >Possible, but length of traces to wire all those together will keep
> >it to KHz range and needs few large boards that needs so much power
> >that hottest athlon cpu is low power by comparsion.
>
>
> It would eat power but it would not be that slow. The mos logic of
> the time was quite slow compared to the ttl of the time.
>
> I did do a 2901C version of z80 and it was much faster than the MOS
> version, not due to the 2901s as they were logic savers but the
> acutal speed bottleneck as well.
>
> I have seen photos of apple IIe prototype laid out on early
> pre-production logic board, one of that 40 pin chipset socket is
> hooked to a equally same size board filled to the 4 edges with
> tightly packed TTLs and few large ICs, I think it was shown in Byte
> as well as few other publicatons. Large board full of chips vs. 40
> pin IC, same thing...Amazing!
>
>
> That was replaced by a 2000 or so gate array so thats were it
> all went. Also the proto was built of all SSI TTL making it less dense.
>
> I did some work like that in the early 80s. Logic was faster than
> you think. It's true to get to the sub 100ns range for serious
> cpus you have to get the interconnect problem out of the way.
> However for a fairly fast machine (4-10mhz clocks) there are
> many examples that are mostly ttl. For starters the PDP-8E
> ca. 1971ish executes instructions in 1.4uS for the base modes
> and that was SSI ttl on low density boards. FYI it was limited
> by the core cycle time not the TTL, I ran one at nearly twice
> speed easily with semicon memory.
>
> Allison
>
--
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* John Ott * Email: jott_at_hamming.ee.nd.edu *
* Dept. Electrical Engineering * *
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Received on Fri May 04 2001 - 13:38:28 BST