There's been so much unwarranted (IMHO) skepticism about the ability to transfer
a solid DEC CPU design into CPLD/FPGA that I'd really like to see someone try
it. The DEC folks didn't often do the wierd things that make circuits act
squirrely when the technology is changed, and a bit of forward-thinking
synchronous strategy applied to the older asynchronous designs could probably
fix the older designs so they'd work fine in current technology, and probably
MUCH faster. I'm not interested in DEC stuff myself, but the fact that there
are several manufacturers making logical equivalents of the DEC CPU's today
suggests that it's not as difficult as one might think.
Implementing an instruction set in programmable logic isn't terribly difficult,
aside from the discipline issues. If you (1) stay in the chair, (2) stick to
the original target, and (3) accept (don't fight) the necessary compromises
(it's hard to accept 25 MHz operation from a device that you thought should
yield 150), you'll get it done. Once the design is entered, simulated,
synthesized, simulated and tested as implemented, there's room for fixes. The
main problem is that since you can't stick a 'scope or LA probe into the
circuit, you have to rely on the simulator. That's not always easy.
Dick
----- Original Message -----
From: "Heinz Wolter" <h.wolter_at_sympatico.ca>
To: <classiccmp_at_classiccmp.org>
Sent: Saturday, May 05, 2001 8:35 PM
Subject: Re: Allison: 2910c version of z80 and FPGAs - a little O/T
> Chuck, interesting you should mention the Burch kit...and
> the PDP10 in the same message! I'm using my Burch-
> board( a wonderful product at a great price- good work Tony!)
> to debug bits and pieces of my KL-10 fpga design. So far I've
> only got the 36bit alu, IR, MAR/MDR, CC muxes(the easy parts)
> and am reverse engineering the rest from the KS-10 and KL-10
> microcode. You can do a lot with even a 200kgate part - the XCS200
> I've got Webpack software that Tony ships with the board, as well as a
> student version of Foundation from a book, and WARP from
> another book to develop with. Major integration and verification
> will require a full Foundation or similar software for around 3KUS$.
> As a nifty mini-project - it would be nice if a PDP11/40 (the KL-10
> front end ) could be made to fit on a Burch board and XC2S200 part.
> If you're interested in CPU soft cores for fpga - check out Jan Gray's
> excellent site http://www.fpgacpu.org/ . Alphdata in Scotland has a PCI card
> with
> fast SSRAM and an Xilinx XRC/812E-8 perfect for a KL-10 implementation.
> Neil Franklin is also working on squeezing a KA-10 into an XC2S200
> (same as on the Burch- using JBits)
> Regards,all
> Heinz
>
> ----- Original Message -----
> From: "Chuck McManis" <cmcmanis_at_mcmanis.com>
> To: <classiccmp_at_classiccmp.org>
> Sent: Saturday, May 05, 2001 3:49 PM
> Subject: Re: Allison: 2910c version of z80
>
>
> > Heinz mentioned the Spartan FPGAs and Allison added:
> > >a nice Virtex or Spartan fpga will fit a whole processor
> > > >with up to 1mbit or sram on chip.
> > >Far more interesting, out of my range of tools to do.
> > >Allison
> >
> > Check again Allison. I've been playing around with a Spartan-II 200K gate
> > FPGA that is on a board built by Tony Burch <http://www.burched.com.au>
> > (and my experiences with it are here:
> > <http://www.mcmanis.com/chuck/robotics/fpga>). The board and some support
> > stuff (SRAM, Serial/Kbd/mouse ports, etc) was less than $400 and the
> design
> > tools are *free*. You do have to take the time to learn VHDL but so far
> the
> > payoff has been worth it for me. I'm having a blast with this thing. My
> > "final" is a PDP-8 w/ Serial terminal (think DECMate in a single chip)
> with
> > full lights and switches. This chip can do that easily. I don't think it
> > can do a KL-10 but it might ...
> >
> > --Chuck
> >
> >
> >
> >
>
>
Received on Sun May 06 2001 - 11:39:13 BST