booting from RQDX3

From: Pete Turnbull <pete_at_dunnington.u-net.com>
Date: Thu May 31 19:24:22 2001

On May 31, 4:45, John Allain wrote:

> Would 30+ lines of assembly always be required?

I've lost the context that prompted that particualr question, but if you're
asking if a bootstrap always needs 30+ lines of instructions, no, some are
much shorter than that. This is the bootstrap for a TU10 magtape:

100000 012700 MOV #0172526, R0 ; TM11 (TU10) MTCMA magtape
current memory addr
100002 172526
100004 010040 MOV R0, -(R0) ; byte count, 2's compl, -2730
allows up to 2730
100010 012740 MOV #060003, -(R0) ; MTC command reg: 800bpi 9-trk,
odd parity,
100012 060003 ; unit 0, no IRQ, extended bits
zeroed, read+go
100014 000777 BR 0100014

This is the code for an RXV21 (RX02 floppy controller) which is one of the
longer ones (the comments are mine):

     1 000000 ; RXV21_boot From Microcomputer Interfaces
Handbook 1983-84, page 484
     2 000000 ; Use ODT to enter, then set RS=340,
R6=1000, R7=1000, then P
     3 000000 ;
     4 000000 ORG O1000
     5 001000 ;
     6 001000 012700 MOV #O100240,R0
     6 001002 100240
     7 001004 012701 MOV #O177170,R1 ; RXCSR
     7 001006 177170
     8 001010 005002 CLR R2
     9 001012 012705 MOV #O200,R5
     9 001014 000200
    10 001016 012704 MOV #O401,R4 ; track 1,
sector 1
    10 001020 000401
    11 001022 012703 MOV #O177172,R3 ; RXDBR
    11 001024 177172
    12 001026 030011 BIT R0,(R1)
    13 001030 001776 BEQ $-4 ; wait for
TransferReq or Done
    14 001032 100437 BMI O1132 ; branch if
ERR set
    15 001034 012711 MOV #O407,(R1) ; set DDens,
Read, Go
    15 001036 000407
    16 001040 030011 BIT R0,(R1) ; wait for TR
    17 001042 001776 BEQ $-4
    18 001044 100432 BMI O1132 ; branch if
ERR set
    19 001046 110413 MOVB R4,(R3) ; give sector
number
    20 001050 000304 SWAB R4 ; swap track
and sector
    21 001052 030011 BIT R0,(R1) ; wait for TR
    22 001054 001776 BEQ $-4
    23 001056 110413 MOVB R4,(R3) ; give track
number
    24 001060 000304 SWAB R4 ; swap sector
and track
    25 001062 030011 BIT R0,(R1) ; wait for TR
    26 001064 001776 BEQ $-4
    27 001066 100421 BMI O1132
    28 001070 012711 MOV #O403,(R1) ; EmptyBuffer
(DDens) command
    28 001072 000403
    29 001074 030011 BIT R0,(R1) ; wait for TR
    30 001076 001776 BEQ $-4
    31 001100 010414 MOV R4,(R4) ; save sector
number
    32 001102 010513 MOV R5,(R3) ; set word
count=256
    33 001104 030011 BIT R0,(R1)
    34 001106 001776 BEQ $-4 ; wait for
done
    35 001110 100410 BMI O1132
    36 001112 010213 MOV R2,(R3) ; set
address=0
    37 001114 060502 ADD R5,R2 ;
increment...
    38 001116 060502 ADD R5,R2 ; ...address
    39 001120 122424 CMPB (R4)+,(R4)+ ; bump R4 by
2 and clear all flags
    40 001122 120427 CMPB R4,#3 ; sectors 1
and 3 get done
    40 001124 000003
    41 001126 003735 BLE O1022 ; loop if not
finished
    42 001130 012700 MOV #0,R0
    42 001132 000000
    43 001134 005007 CLR PC ; go to
address zero
    44 001136 120427 CMPB R4,#0 ; dummy
operation, pipelined but not executed
    44 001140 000000


> I thought DEC 11's all did higher level booting with a memory
> mapped address in the pre-Vax and with named console
> devices in the Vaxes.
>
> Are you then saying that adding a disk controller card always
> requires adding a matching boot (E(P(ROM))? ('Duuh' -JEA)

There has to be *some* code *somewhere*, and different controllers need
different boot code (if only because they have the registers at different
addresses). There isn't any ROM on a KDF11-A or KDJ11-A, so you need there
to be some bootstrap code on one of the other cards.

Third-party controllers often have unique boot code on the card. Most DEC
controllers rely on a boot ROM being on a special bootstrap board (like a
BDV11, which also has a line time clock and bus terminators), a ROM board
(like an MRV11-D) or a multifunction card (MXV11, which also has DRAM
memory, clock, and serial lines for the console and one other serial
device). Most of the DEC bootstraps for Qbus systems offer a choice of
boot options (different disks, network, etc) and in addition will do a
simple memory test (or at least write to it to ensure the parity or ECC is
correct); many of the later ones are interactive.

-- 
Pete						Peter Turnbull
						Network Manager
						University of York
Received on Thu May 31 2001 - 19:24:22 BST

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