Intel C8080A chip brings $565 on EBAY

From: Allison <ajp166_at_bellatlantic.net>
Date: Mon Nov 19 13:43:19 2001

It was nowhere near that frequent. We used number like 1/10^6
device hours for occurance rates. Often they found minor burps
in the system were at fault.

As to the ceramic VS plastic you have to looks carefully at the
system as the two have different leadframes, operating temps,
likely timing and bus capacitance. All of those things for a given
system interact. The worst example was early intel ceramic
parts (8755, 8748, 8749 and 8751) where the lid was floating
(not attached to any pin), they were quite sensitive to small
static charges accumulating on the lid! People thought it was
radiation doing it! Simple ESD problem.

The reason it's less a problem is ECC is common as is error
scrubbing and fewer interconnects, packages and die. Then
again do we know that the last Blue Screen Of Death (BSOD)
was really a MS OS burp or some system data error? :-) Try
and buy memories larger than say 1Mbit in ceramic now.

In all the systems I've encountered denser memories went
hand in hand with better reliablity of that part of the system.


Allison
-----Original Message-----
From: Richard Erlacher <edick_at_idcomm.com>
To: classiccmp_at_classiccmp.org <classiccmp_at_classiccmp.org>
Date: Monday, November 19, 2001 2:13 PM
Subject: Re: Intel C8080A chip brings $565 on EBAY


>Gee, Allison, that's not how I remember that stuff at all. We had a dozen
or
>more machines running a really thorough memory tests in the early '80's and
the
>purpose was to quantify the difference in error rates between ceramic and
>plastic parts. In order to do that, all you needed was a big enough DRAM
array,
>and you'd see them at a rate of about one or two per minute from among
those
>machines. Of course we'd be using about 8 boards measuring about 16" x 22"
with
>288 devices per board, then tracking the locations of the corrected errors.
If
>you used plastic parts, the error rate dropped, comparatively, by about
90%.
>That's the reason the problem was so widely discussed. It's odd that it
doesn't
>exist anymore, with the typcial home computer having about as much RAM
nowadays
>as all the computers in the world had when I was in college. BTW, that
entire
>problem went almost completely away once the DRAMs were redesigned with
that
>checkerboarding mod I mentioned.
>
>Dick
>
>----- Original Message -----
>From: "Allison" <ajp166_at_bellatlantic.net>
>To: <classiccmp_at_classiccmp.org>
>Sent: Monday, November 19, 2001 10:31 AM
>Subject: Re: Intel C8080A chip brings $565 on EBAY
>
>
>> back then I was involved in that stuff and 99% of the Dram problems were
>> design
>> related and not alpha particle. To see the alpha particle in real apps
>> you'd need
>> a box that had thouands of them running 7x24 for weeks! S100 systems
that
>> ran
>> that well were prone to the power company failing to deliver before ram
>> failure was
>> a problem!
>>
>> Back in that time frame I used static ram due to the general flakyness I
>> preceived
>> of most S100 cards. The best S100 ram I'd used for that time frame
(1980)
>> had an 8202( Netronics DRAM using 16Ks).
>>
>That board (I've still got a couple, 1 still unbuilt) was very, Very, VERY
slow,
>and used somebody's rather lame DRAM controller IC. The boards from CCS
had
>timing adquate for use with 64K parts if you didn't mind making the mod's,
AND
>they worked. The stock and unmodified version of those boards ran in a set
of 8
>boards for one of my clients running something like Mmmost or whatever it
was
>called, for several years and, since they had a UPS, never experienced a
failure
>in the time I worked with them. The Systems Group stuff worked really
well, and
>I still like 'em, though the boards are 512K boards rather than the 128K
ones
>they were then, having been designed with the eventual emergence of 256K
parts
>in mind.
>
>The main problem with S-100 DRAM boards was that designers seldom
understood
>both the S-100 timing and the proper use of DRAMs. Frankly, since there
wasn't
>a standard, it is understandable that nobody could get complete
interoperability
>from DRAMs with reasonable timing, since the S-100 had been designed around
one
>CPU and then the most popular CPU was promptly replaced by another one with
>completely different timing.
>>
>> Allison
>>
>>
>> From: Douglas Quebbeman <dhquebbeman_at_theestopinalgroup.com>
>>
>> >> Back in the early days of 64k DRAMs, the COORS ceramics were described
as
>> >having
>> >> too much radioactivity for use in high-density memories. I'm not sure
>> that
>> >was,
>> >> in fact, the case, but somebody seems to have thought so. Do you
suppose
>> >they
>> >> fixed that? Coors was a leader, in the '60's in porcelain tooling and
>> other
>> >> such oddities, not to mention having "perfected" the draw-and-iron
>> process
>> >for
>> >> making thin-walled aluminum beverage cans.
>> >
>> >My 8k EconoRAM IV, one of the first S-100 boards to use DRAM, used the
>> >very chips that supposedly had that problem. I've been told mine are
>> >OK, but it used to be a bit flaky; however, I always blamed that on
>> >the state of the early S-100 systems and my soldering work on the SOL
>> >to which it was attached... I solder *much* better now... -dq
>> >
>>
>>
>
Received on Mon Nov 19 2001 - 13:43:19 GMT