CPU design at the gate level

From: M H Stein <mhstein_at_usa.net>
Date: Thu Nov 1 14:56:22 2001

Not to mention relays-> tubes (valves for tony)-> transistors -> RTL->...

Oops, I see someone else remembers the 914; thanks, Peter.

------------Original Message---------------

DTL -> TTL -> LSI -> FPGA, the gates are the same, just the wires got
smaller and the way one manipulates them changed.
Received on Thu Nov 01 2001 - 14:56:22 GMT