CPU design at the gate level

From: Chuck McManis <cmcmanis_at_mcmanis.com>
Date: Fri Nov 2 22:44:20 2001

> > Nowadays, you're
> > required to use a 1000+ pin BGA package to get the quantity of logic
> that you'd
> > like in a 44-pin PLCC.

The above statement is completely untrue. You can get 10 - 100x the "ttl"
equivalent logic in a 44 pin PLCC. Check out the XC9572 some time,
depending on your logic you can replace a whole bunch of TTL and they are
$5.53 each from Digikey, quantity 1. Or go to 84 pin PLCC, still allows you
to do through hole work for $7.00 and get 50% more gates.

> If you're really lucky with the fit, the device will
> > allow you to use 10% of the gate count the marketing guys said you're
> paying
> > for.

If you're a really lousy logic designer you can create crap anywhere, no
need to go the FPGA route.

[the price comments were still more crap]

>Don't forget the $500 minimum order per line item. I suspect you need
>all the 1000+ pins since only 50% of the pins are usable -- the power,
>ground and configuration pins take up a lot of space.

If you use something like the XV1000 (1 MILLION equivalent gates, then yes
the chip will cost you $1700 and you can design in a complete PDP-11/70,
GT-44 subsystem, RL/RK/RX controllers, SDRAM memory controller, front panel
for blinken lights, full floating point, CIS and EIS instruction sets and a
programmable microstore with about half the damn chip left over.

Sheesh, don't dis 'em if you don't know anything about them.

--Chuck
Received on Fri Nov 02 2001 - 22:44:20 GMT