From: Richard A. Cini, Jr. <rcini_at_optonline.net>
org 0
start:
4 ei
10 lxi b,0 ; inner loop = 65536 times
7 mvi d,50 ; outer loop = 50 times
;;; one time setup 21 cycles (10.5 uS)
loop:
11 push b ; this is just to increase the instruction count
11 push d
11 push h
11 push psw
10 pop psw
10 pop h
10 pop d
10 pop b
5 dcx b
5 mov a,b
4 ora c ; done with inner loop?
10 jnz loop ; if not, keep going
Main loop 108 cycles, 8080A JNZ is 10 tcy pass or fail condition.
65536*108=7077888cy (3.538944 sec)...
assuming one wait state per memory access the 108 becomes
138cy, 65536*138=9043968cy (4.521 sec)
this adds 15cy or 7.5us to the loop 50 times.
5 dcr d ; do this 50 times
10 jnz loop
The two loops total 176947575uS (176.947 sec) or 353895150 clock
cycles assuming NO wait states. one wait state per memory access
will add considerably to the loop times (>226sec!).
housekeeping 3.5us
7 hlt ; done with speed test
end start
I would appreciate it if someone with an Altair could put this in and
time,
in seconds, how long it takes to perform this test.
About an hour.... first 55 minutes to toggle it in and watch it crash
repeatedly. Then there were the crashes due to bus noise...
Seriously if you have the 8080 book you can calculate it as the basic
altair
was 2.00 mhz (500ns Tcy) with no wait state ram. if you had 88S4k the
wait
states for refresh were asynchronous and hard to predict. If the ram
was 88s4k the refresh was invisible as it was synchronous.
If you got it right.... roughly 177 seconds for no mait memory and
somewhere
around 227seconds for memory requiring one wait state per access.
8085 and z80s execute this faster for the same clock due to different
numbers for instructing timing such as jumps which have shorter timing
if the condition fails.
Allison
Received on Sat Sep 01 2001 - 21:58:45 BST
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