CPU design at the gate level

From: Richard Erlacher <edick_at_idcomm.com>
Date: Sat Sep 22 17:01:43 2001

While it makes sense that clock distribution would increase power consumption, I
don't think that synchronous/vs asynchronous design is the point of the article
to which you refer. Synchronous designs do, however, require that every stage
of the "pipeline" is clocked from the same clock, there are ways of synchonizing
events between asynchronous modules in a circuit that minimize the risks of
metastability, and that's the principal bugaboo that gave rise to the popularity
of all-synchronous design. Moreover, it requires somewhat more imagination and
resourcefulness to design efficiently interacting asynchronous circuits, which
tend, generally to be a mite thriftier if implemented in discrete components,
yet yield little benefit to the designer of CPLD/FPGA-based logic.

The type of CPU they're referring to in this case, methinks, is a level-latched
rather than edge-triggered-flip-flop based architecture. It has some potential,
but, since it's not the cookbook sort of structure that is taught in colleges
these days, it will be a while before it's fully explored. The MOT 6800 and
MOS-Technology 650x types used that sort of approach, using the "clock" to gate
and steer rather than to trigger events.


----- Original Message -----
From: "Derek Peschel" <dpeschel_at_eskimo.com>
To: <classiccmp_at_classiccmp.org>
Sent: Saturday, September 22, 2001 1:40 PM
Subject: Re: CPU design at the gate level

> On Sat, Sep 22, 2001 at 09:01:28AM -0600, Richard Erlacher wrote:
> > One caution is certainly warranted, however. Fully synchronous design
> > the default method of designing circuits of anysubstance in the mid-late
> The pendulum may be swinging back toward asynchronous design.
> http://www.acm.org/technews/articles/2001-3/0921f.html#item13
> The ACM article mentions the increased speed of asynchronous designs. As
> you said, they are hard to analyze (and keep running); the article turns
> that into an advantage by pointing out that hackers can't analyze them
> easily either. :)
> I don't necessarily buy the reasoning (these articles are pretty
> superficial) but the point still bears thinking about.
> -- Derek
Received on Sat Sep 22 2001 - 17:01:43 BST

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