Core Memory Interfacing?

From: Allison <ajp166_at_bellatlantic.net>
Date: Wed Apr 3 16:01:40 2002

From: Loboyko Steve <sloboyko_at_yahoo.com>
To: classiccmp_at_classiccmp.org <classiccmp_at_classiccmp.org>
>been mentioned before. Without those, its a heck of a
>lot of discretes, and there's no way around it. Too

There are pther parts out there.

>a wall. I also suspect that because of all of the
>unknowns involved regarding the magnetic properties of
>the core that you use, the way to go about it is to

If you read the article ALL of those parameters are can be
tested and defined, before building the whole core plane.

>of core is that there are thermistors involved also,
>and that core had a very narrow range of temperature
>operation. There were even programs designed
>specifically to cause "hot spots" in the core in order
>to test it (you'd have to know the physical layout of
>the core to pull this trick off).

Actually when doing that you'd also vary the slice level or
the power supply levels to see where the edges are.

FYI: I checks my notes and a 64x64 array needs 65
drivers and something like 192 diodes to drive the select lines.

Allison
Received on Wed Apr 03 2002 - 16:01:40 BST

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