TTL computing

From: Ben Franchuk <>
Date: Wed Apr 10 16:30:31 2002

Richard Erlacher wrote:

> If you look at the Cypress CPLD's, I think you'll find them large enough to
> put the whole she-bang, i.e. CPU, FDC, HDC, I/O, RAM, ROM on one device. The
> advantage is that with a CPLD theres no doubt at all about what the timing
> will be and whether you can use this register or that, since you can ALWAYS
> use 100% of the resources. What I find hard to fathom is that with the
> FPGA's, you pay for 16Mgates and can use barely 4M of them, and that only if
> you're fortunate enough to be able to route to every LUT.

A routes better I think than X, but still I had to play with the design
allot to get it to fit.

Ben Franchuk - Dawn * 12/24 bit cpu *
Received on Wed Apr 10 2002 - 16:30:31 BST

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