[fpga-cpu] Re: TTL computing

From: Philip Freidin <philip_at_fliptronics.com>
Date: Sun Apr 14 13:49:14 2002

On Sun, 14 Apr 2002 09:00:50 -0600, Ben wrote:
>I have a nice FPGA prototype kit, (altera) but I am having problems
>getting A PROM for it. I may go to using smaller chips like the XC-9572
>(72 macro cells) ? $12 canadian. They don't make wire wrap PLCC sockets
>(or not in DigiKey) so I will end up with making a PCB. I have a new CPU
>design and expect about 10 CPLD's in total.

Before you give up on wire-wrap, PLCC sockets (through hole, not surface
mount sockets) have their pins on a .1 inch grid. I have often used strips
of N x 1 wirewrap socket pins, cut to length, and made up ww sockets to
match the underside of a PLCC socket. Such as these:


Philip Freidin
Received on Sun Apr 14 2002 - 13:49:14 BST

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