QBUS VAX and M7941 under VMS - info needed!

From: Carl Lowenstein <cdl_at_proxima.ucsd.edu>
Date: Thu Apr 18 19:45:50 2002

> From owner-classiccmp_at_classiccmp.org Thu Apr 18 15:17:12 2002
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> Date: Thu, 18 Apr 2002 22:38:24 +0100
> From: Dave Woodman <dave_at_naffnet.org.uk>
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> Subject: QBUS VAX and M7941 under VMS - info needed!
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> Hi all,
> I have a MicroVAX (BA123 enclosure, KA650 CPU) that I would like
> to put to work... to this end I have two M7941 (DRV11) parallel I/O
> cards that I would like to bring into service. The Micronotes say that
> this card is compatible with the 22-bit QBUS, and I have the Field
> Service print set so I can set the CSR and vectors to appropriate
> values.
> Of course, VMS does not have a driver for these cards, but I am
> not too frightened by the prospect of a little code - here lies the
> problem! Can anyone tell me just how this card maps into the I/O space,
> given the CSR? I would like to know just where to read from and write to
> in order the drive the beastie...

It's sort of standard DEC for a parallel interface.

CSR + 2 is the output buffer, connected to connector J1
        Bits in CSR+2 are read/write to the CPU
besides the data lines, J1 has some control bits
        REQA which maps to CSR<15> and is read-only
        NEWDATA, pulse output by CPU writing to CSR+2,
           which should be used to clear REQA
        CSR1 which is CSR<1>, read-write for device control

CSR + 4 is the input buffer, connected to connector J2
        Bits in CSR+4 are read-only to the CPU

J2 has control bits:
        REQB mapped to CSR<7>, read-only
        DATATRANS, pulse output by CPU reading CSR+4,
           should be used to clear REQB
        CSR0 which is CSR<0>, read-write for device control

CSR has the usual INT_ENB A at <6> and INT_ENB A at <5>
INT_ENB AND REQ makes an interrupt. Interrupt A at VEC, B at VEC+4.

Information from "microcomputer interfaces handbook 1980"

        carl lowenstein   marine physical lab   u.c. san diego
Received on Thu Apr 18 2002 - 19:45:50 BST

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