MFM IC's (Was RE: Any AMIGA users?)

From: Pat Finnegan <pat_at_purdueriots.com>
Date: Sun Jan 6 12:25:30 2002

On Sun, 6 Jan 2002, Richard Erlacher wrote:

> ----- Original Message -----
> From: "Pat Finnegan" <pat_at_purdueriots.com>
> >
> > OK, With all this talk of drive controllers, I've got two questions that
> > I've had little luck finding answers to:
> >
> > 1) Are there any IC's available today that will do MFM and
> > write-precompensation, but very little else? Basically it'll need to do
> > the MFM, have a PLL for decoding the MFM, some sort of 'start read' and
> > 'start write' inputs I can trigger from a sector pulse, and a
> > write-precomp. Another question: Is write-precomp that important?
> >
>
> Either of these, and a wide range of others can easily handle floppy disk
> interface by conventional "bit-banging" techniques, while the faster ones I've
> mentioned can easily process a hard disk too. All that's required is a
> thorough understanding of the task requirements and thorough understanding of
> the controller's operation.
>
> Write precompensation is definitely necessary. With floppy disks, it required
> imposing a bit shift of about between 1/16 and 1/8 the bit rate. With MFM
> hard disks, the most common amount was about 60 ns against a 200 ns bit
> window. The most common compromise I observed in FDC's intended for both 500
> and 250 MHz bit rates was about 160ns, or, essentially a 6 MHz clock. For
> hard disks of the '80's a 16 MHz clock would have worked just fine.

OK, Well I was hoping not to play that game, but I might just end up doing
it. Here's a snippet of tech info I've learned about the drives that
might be useful in deciding a better method (if possible):

1) Bit-clock is 4.2MHz
2) Write precomp on the RL-8A (pdp-8 native) controller goes from -15 to
   +15ns
3) There's a sector pulse (no index pulse as far as i can tell) which
   'falls' at the start of the first data bit of the header... The header
   is composed of 3 8-bit words of 0's a '1' marker bit, address, etc, and
   then a crc, followed by the data

Basically I want to have something that will 'start' on the falling sector
pulse, and mfm-decode the data, and make it available 8 bits at a time
(simple 8-bit shift reg should do that nicely).

In order to do the mfm decoding/encoding, I was planning on programming a
PAL with a simple state machine (perhaps more than one... but that depends
on how many I'll end up needing). I just didnt want to end up with a
drive controller the size of the origional RL-8A, RL(V)11, or RLV12...


Thanks much for your help!

-- Pat
Received on Sun Jan 06 2002 - 12:25:30 GMT