At 11:46 PM 7/15/02 +0100, Tony Duell wrote in response to my question:
>...
> > Here is where I need advice. I can't find my TTL databook, but it would
> > appear that the trigger inputs are edge triggered, not level triggered,
> right?
>
>None of the databooks explicitily state this (they all show a timing
>diagram where a second _pulse_ on one of the inputs restarts the time
>period, but that's why it's called a retriggerable monostable). But a
>couple of them _imply_ it's edge triggered. I would want to check this
>more carefully, possibly by experimenting with a 'loose' chip before
>deciding, though.
The syndrome is that the active high/positive-edge triggered input is high,
and the Q-bar output is stuck low. So just by inspection I can't tell if
the thing is level triggered (which would be consistent with what I see on
the broken board) or edge triggered but with a broken device.
>Do check the timing capacitor, particularly if electrolytic. It's a
>common problem with such circuits.
It isn't an electolytic -- the time constant is on the order of 1-10uS or
so. I think it is a mica cap (100pF), which of course is unpolarized.
>-tony
Thanks. I've ordered a couple replacement 74123s and a couple caps too,
just in case. Since I don't do hobby electronics much, I don't have these
things lying around, so I'll pay the price in shipping and time.
-----
Jim Battle == frustum_at_pacbell.net
Received on Tue Jul 16 2002 - 00:28:04 BST
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