> > >The design goal was a low-cost (smaler chip) design, realized by
> > simplifying the decoder stage. There were no instructions with the value
> > xxxxxx11, reducing the 1-of-4 decoder to a single NAND gate. Instructions
> > with the value xxxxxx11 actually executed two instructions in paralell, some
> > of them useful. <
> > Now, I didn't look at an opcode map, but it seems that this is an
> > interesting twist that I've never seen quoted when people discussed the
> > mysterious undocumented 6502 opcodes executing what appeared to be multiple
> > instructions.
> I've actually heard that some of the undocumented 6502 opcodes appeared to
> do two operations,
They sure do. For example, I believe there's a LAX that loads the
accumulator and X register simultaneously. Others are considerably more
useless, and there's several HCF-type instructions also.
--
----------------------------- personal page: http://www.armory.com/~spectre/ --
Cameron Kaiser, Point Loma Nazarene University * ckaiser_at_stockholm.ptloma.edu
-- ** COMMODORE 64 BASIC V2 ** 64K RAM SYSTEM 38911 BASIC BYTES FREE ----------
Received on Thu Jun 06 2002 - 20:12:14 BST