[CCTECH] Interesting tidbit on 6502

From: Dwight K. Elvey <dwightk.elvey_at_amd.com>
Date: Fri Jun 7 17:00:00 2002

>From: ard_at_p850ug1.demon.co.uk
>
>> >Not on the 6800 but I believe some FORTH chips have that problem.
>
>Incidentally, some Xilinx FPGAs will spectacularly overheat if fed bogus
>configuration data. You can get 2 internal buffers driving the same line
>in oposite directions. The CAD software is supposed to never generate
>such a configuration file, of course, but if there's a bug in the
>software, or the data is corrupted on download to the chip, it can
>happen. Don't ask how I found that out.
>
>
>> Instructions that would continuously increment the address
>> are vary useful for debugging address decoding problems.
>
>True...
>
>> On an 8080, about the only useful sequence is to have
>> a pop and jmp, using 4 locations.
>
>What's wrong with forcing a NOP (00) onto the databus. That should make

Hi
 This does require that you have full control of the bus. I have
used the 00H as well as the 0FFH. When you have a partially working
bus, running code is prefered because simply pulling the ROM
may not always work Some broken device may inject
and instruction and break the loop. It is good to have all
three methods of running addresses in your tool box.
 It is too bad that the simple 00 and 0FFH codes don't work for all
processors, like the 8080's.
Dwight
  
>the PC increment from 0 to 0xFF. Or force RST38 (0xFF) onto the databus.
>That will cause repeated fetches from location 0x38 with memory writes of
>39 00 to every 16 bit word of memory in decreasing address order -- it's
>pushing the return address (0x38+1 onto the stack, of course). Both
>instructions are easy to force and have very recognisable effects on the
>bus lines.
>
>One of the tests for the TRS80 Model 1 (Z80 based) is to pull the ROMs.
>The databus is pulled high, so the CPU should execute RST38s. It writes
>the return address to the video memory (as well as user RAM, of course),
>giving a display of alternate '9's (0x39) and '_at_'s (0x00 -- the TRS-80
>video display circuit ignores bit 6 IIRC).
>
>-tony
>
>
Received on Fri Jun 07 2002 - 17:00:00 BST