6502 cycles and subtleties (was Re: Assembly on a Apple IIc+)

From: pete_at_dunnington.u-net.com <(pete_at_dunnington.u-net.com)>
Date: Sun Feb 9 08:53:01 2003

On Feb 8, 19:02, Eric Smith wrote:

> Well, I haven't counted them, but pretty much all instructions that
> use the ALU do that. This includes ADC, SBC, ORA, AND, EOR, BIT,
> and (when the accumulator is the destination) LSL, ASR, ROR, and ROL.
> And the PLP and PLA instructions, which increment the stack pointer
> using the ALU during the next fetch.

Are you sure? My understanding is that PLP and PLA increment the stack
pointer *before* fetching the byte off the stack. The 6502 stack
pointer always points to the next free location on the stack. It's
possible that it does something like:

fetch instruction
decode, and set up ALU to generate SP+1
fetch [SP+1]
add 1 to SP while fetching next instruction

Maybe you're thinking of PHP and PHA ([SP]:=A; SP:=SP+1), which take
one cycle less than PLP/PLA?

Pete						Peter Turnbull
						Network Manager
						University of York
Received on Sun Feb 09 2003 - 08:53:01 GMT

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