I know the boards used in the IPX and IPC had a sparc with a specific
way of partitioning memory at very high and low addresses.
Sparcs didn't have all the address mapping gunk that the Intel cpus
have, and so sun came out with a way to have a small footprint of memory
have a block of memory mapped low and very high in the address space.
this allows the upward growing or block memory to be allocated in a large
area from 0->up and the descending growing things like stacks to be
allocated
high and grow down, as the system ran. No need to put them in a low space
and then have the collide.
I understand this is a memory allocation / O/S thing and the specific
problem
was to make the page tables or what have you not have a big hole in the
middle
where there never would be any memory. If you have an address space, the
page tables or whatever they are called tend to reflect the physical memory,
so if you want to address a block of it low and hi, you have a big block of
zeros in the middle.
I think there is some sort of offset that allows you to have the high and
low
memory, and have all the table entries hit together with a concept of
wrapping
the spaces low and hi together.
I.E. the first table entry would not be for page 0, but could be for
something
like the first page of the high memory. The page 0 entry would be in the
middle
of the table somewhere. But there would be no unused block.
I am sorry not to have the exact terms here, but I heard this account from
someone
who has coded extensivly on the Sun platform doing malloc and memory
allocation
work in the system.
I don't know which this is, but am sure it is for the cheepo platforms,
which they
did like the IPX IPC. At the time of the first pizza box, Sparc-2 that was
a high
end workstation so it would not have had this as a design goal.
Jim
Jochen Kunz wrote:
> On Fri, 19 Nov 04 19:32:13 GMT
> msokolov_at_ivan.harhan.org (Michael Sokolov) wrote:
>
> > Does anyone know what are the real technical differences between sun4,
> > sun4c and sun4m subarchitectures of SPARC from the viewpoint of an OS
> > kernel writer?
> I am not entirely sure, but I think the differences are in in the CPU
> cache, the MMU, the IO architecture (sun4 VME, sun4c SBus) and sun4m is
> based on SPRAC V8 CPUs where the older sun4 / sun4c is based on V7 CPUs.
> This is a bit simplified. E.g. the SM100 MBus CPU module is for sun4m
> machines but has two V7 CPUs. Also: The sun4/6xx CPU boards are sun4m
> with VME _and_ SBus. In addition they are the first and only sun4m CPU
> boards with VME.
>
> Not to talk about sun4d or Solburn (?) machines...
>
> I know you don't like it, but maybe the NetBSD kernel source is a help.
>
> Google for a file named "sun.hardware.FAQ"...
> --
>
> tsch??,
> Jochen
>
> Homepage: http://www.unixag-kl.fh-kl.de/~jkunz/
Received on Wed Nov 24 2004 - 11:53:15 GMT