On Sep 24 2004, 15:39, Ade Vickers wrote:
>
> Additional: Hunting around for a suitable CPU to implement in relays,
I
> came across the P8 CPU design
(
http://www.rexfisher.com/P8/P8_TOC.htm).
> This uses a 74LS181 4-bit ALU, which I reckon would require 149
relays to
> replicate. The only thing that confuzzles me is: what use, exactly,
is a
> 1-input AND? Several of these appear on the 74LS181 schematic...
I've not seen the specific diagram you're referring to, but are you
sure they're not NAND gates? There are a few in the diagram I have. A
1-input NAND is of course an inverter. But otherwise, a 1-input gate
could be used as a buffer (there are some inverters on the LS181 inputs
for that reason) or to equalise the gate delays along some particular
path to match another.
--
Pete Peter Turnbull
Network Manager
University of York
Received on Fri Sep 24 2004 - 12:30:40 BST