Relay computers - OR functionality

From: Dwight K. Elvey <>
Date: Tue Sep 28 12:59:59 2004

>From: "Ron Hudson" <>
>I had, at one point, sat down and tried to devise a JK flipflop out of
>I can do a latch... where (in) pulls in the relay and a NO contact
>v+ to keep the relay in.. but everything I tried just vibrated... :^\
>In a relay computer wouldn't one need flipflops for memory?

 The problem you have is controlling delays. In designing things,
you need to consider things like setup and hold timing as well
as race conditions. In normal circuits, a flip-flop is composed
of two latches with opposite clocks. In normal design, one
needs to either make these two clocks non-overlapping or
if one clock slightly overlaps the other, the data path between
a previous flop and the next have sufficient delay that they
won't race.
 Memories are normally composed of simple latches and not flipflops.
Most uP use mostly latch based design and not flop base. Most
ASIC's are still using flop based design but they don't have the
same speed requirements that uP's have.
 Another problem you may have been having is that you didn't
consider the contacts as being break-before-make or make-before-
break types. As was mentioned earlier, some of the relays
have things like shunting coils ( loop of copper ) added
to allow the relay to hold longer. One can also do things
like add capacitors in parallel to the coils to hold a few
 It is easiest to just use some overlapping clocking system.
You just have to think about what happens while the relay is
actuating and all the contacts may be open ( break-before-make ).
Otherwise, you'll be making a lot of nice buzzers. More than
one phase of clock makes things easier.
Received on Tue Sep 28 2004 - 12:59:59 BST

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