"The standard interface is supplied as the output of TTL type 7404.
Signal sense is specified as a Logical TRUE and is a positive level;
logical FALSE is a ground level. Circuit characteristics are shown in
figure 5-2."
This excerpt can be found on Page 46 at:
http://www.pdp8.net/pdp8cgi/query_docs/tifftopdf.pl/pdp8docs/74226-300dpi.pdf
(warning: this server is a bit slow)
Figure 5-2 is approximately this:
o Output Drive
| TTL type 7416
/
\ I Logical True
R / load Iload = -400 ua _at_ 2.4V min (with R=5.6K)
\
|
+--------------->
|
/
| I Logical False
-----| sink Isink = 16 ma _at_ 0.4V max
|
\v
|
+---------------<
|
GND
So I was told before that the way this works is that a signal will be
output as "Logical True" voltage when the data is a '1' and a "Logical
False" when the data is a '0'. But the way the connector is wired is
confusing.
Each of the 12 data lines (for reading the holes on the card) has 2 pins:
the "data" pin and then the "data return" pin. See page 45 of the URL
above.
I imagine the data pin goes into one of my inputs on the 6522 (which
handles TTL levels). However, I was told by Jim Willing that I should use
an optoisolator in between the output of the reader and the 6522 because
the output voltage is clamped mechanically(?) But where does the RET
(return) pin go? To ground? Do I really need the optoisolators? Is the
6522 robust enough to just take the raw signal from the reader output?
I'd rather make this as simple as possible.
Help!
--
Sellam Ismail Vintage Computer Festival
------------------------------------------------------------------------------
International Man of Intrigue and Danger http://www.vintage.org
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Received on Sun Feb 27 2005 - 13:22:22 GMT