PDP-11 addressing question and a model round-up

From: Tom Jennings <tomj_at_wps.com>
Date: Mon Feb 14 14:21:28 2005

> On Mon, 14 Feb 2005, Paul Koning wrote:
>
>> With MMU enabled, each 4 kW chunk of program address space is mapped
>> to a physical address of your choice (possibly two separate ones, in
>> MMUs that support separate instruction and data space maps).

Just FYI, Data General's method is pretty much the same; it's a
standard technique. DG maps the 15-bit user space (16 bit words)
in 4K chunks into physical memory. There is a separate map, in 256
word chunks, for memory protection eg. read-only, for example
shared binary (unix "text") or OS overhead.

IO is fairly primitive on DGs, though pretty nice and very simple.
Other than MUL and DIV &c mapped programs error-trap on IO
instructions.

There's also a data channel, aka DMA. The Novas are not fast, one
motorcycle (megacycle (OK, megaHertz)) or so, but the Supernova
allows data channel to start up mid-instruction! Youch! It'll do
1.25 million 16-bit words/sec to memory. Pretty good for 1980.
Received on Mon Feb 14 2005 - 14:21:28 GMT