> It will only get worse. There's a scientist applying genetic algorithms
> [1] to hardware [2]. The scientist, Adrian Thompson, used an FPGA and
I am sorry, I'd not call him a 'scientist'. At least not in this bit of work.
> "bred" configurations (on a 10x10 area of the chip) to discrimiate between
> a 1kHz and a 10kHz signal:
Assuming that's 100 logic blocks and the chip is of normal-ish speed,
that's nowhere near enough gates to get a 1ms-ish delay. So that sort of
method can be ruled out I think.
>
> So how did evolution do it--and without a clock? When he looked at
> the final circuit, Thompson found the input signal routed through a
> complex assortment of feedback loops. He believes that these
> probably create modified and time-delayed versions of the signal
> that interfere with the original signal in a way that enables the
> circuit to discriminate between the two tones. "But really, I don't
> have the faintest idea how it works," he says.
Does he even have an idea as to what the circuit _claims_ to be without
any extra artefacts (like signal coupling between adjaent traces on the
chip)? If not, %deity help us.
If he does, then it's possible (and can't be that hard, it's a lot
simpler than most of the things I've had to analyse [1]) to work out what
that circuit would do. At least then you'd know if it was down to some
odd behaviour of that particular device.
[1] If he can't manage that, he shouldn't be working with FPGAs. Period.
>
> One thing is certain: the FPGA is working in an analogue manner. Up
> until the final version, the circuits were producing analogue
> waveforms, not the neat digital outputs of 0 volts and 5 volts.
How the heck does he know that? Has he actually been probing traces on
the surface of the die? If so, how does he know that the probing doesn't
change things.
Bringing signals out to pins will (a) reroute them and (b) buffer them,
so this can't be the method. Or at lrast I hope it's not that
method,coupled with a 'scope that rounds off all signals over 100kHz
(I've see that happen....)
> Thompson says the feedback loops in the final circuit are unlikely
> to sustain the 0 and 1 logic levels of a digital circuit. "Evolution
> has been free to explore the full repertoire of behaviours available
> from the silicon resources," says Thompson.
What is that supposed to mean?
>
> That repertoire turns out to be more intriguing than Thompson could
> have imagined. Although the configuration program specified tasks
> for all 100 cells, it transpired that only 32 were essential to the
> circuit's operation. Thompson could bypass the other cells without
So we're now down to aropund 100 gates/ffs. The sort of thing that can be
analysed by hand in an afternoon...
> affecting it. A further five cells appeared to serve no logical
> purpose at all--there was no route of connections by which they
> could influence the output. And yet if he disconnected them, the
> circuit stopped working.
OK, it must be some kind of coupling. Either capacitive coupling between
traces, or via the PSU, or...
> It appears that evolution made use of some physical property of
> these cells--possibly a capacitive effect or electromagnetic
> inductance--to influence a signal passing nearby. Somehow, it
> seized on this subtle effect and incorporated it into the solution.
My big worry is that he doesn't really understand the chip. He doesn't
know how signals are routed, he doesn't know what sort of coupling is
going on, he doersn't know how the various logic gate behave (can they
actually behave linearly?). So IMHO this piece of work is totally
meaningless! That's one reason I don't want to call him a scientist.
>
> -spc (Welcome to the future of non-deterministic hardware/software
> design 8-P
Fortunately my classic computers use deterministic designs, and I am
quite happy to stick to those!
-tony
Received on Wed Feb 16 2005 - 17:26:05 GMT
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