> > He didn't "design" the circuit. What he did was generate X number of
> > random FPGA configurations for the 10x10 cell area, tested each one, and
>
> Sure. But presumably it's possible to read out the final configuration
> from the FPGA and analyse it assuming the FPGA behaves exactly as the
> data sheet claims (i.e. no hidden capacitive coupling, etc). Has this
> been done? If not, why not?
Yes, it was done - turned-out that the (essentially) "illegal" connections
formed were using many of the gates in analogue mode.
>
> Obviously I don;t know how this was done, but I know from bitter (and
> expensive) experience that some configuration patterns for some FPGAs can
> do things like connect outputs together inside the chip (and other things
> that no sane designer would want to do). I got a rather expensive FPGA
> hot enought to let the magic smoke out by doing that...
The - fairly early - FPGA that was used for this had a documented bitstream
and its design tended to prevent this problem.
> Another question. Is this circuit reproducable? If you take the final
> configuration and program it into another FPGA of the same type, does it
> work? That, I think, would isolate coupling effects (which would be much
> the same for all FPGAs of a given type) from threshold effects (which
> wouldn't).
Oh, AIUI it was definitely reproducible - but possibly only on the same
batch of chips.
Andy
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Received on Fri Feb 18 2005 - 11:36:21 GMT