Tony wrote:
>>
>>
>> <But surely this is a limitation of the front panel not the processor.
>> <I/O bus cycles can (easily) be generated from an appropriately designed
>> <front panel.
>>
>> Processor. The 8080 CPU does I/O To/From the accumulator which is
>
>I beg to differ.
>
>All you have to do is to put the CPU into a wait state, tri-state the
>bus buffers and directly drive the address, data and control lines from
>hardware on the frontpanel controller. You can access memory or I/O ports
>that way.
>
In other words, make the front panel do a DMA access, either to memory or an
I/O port? That way it doesn't affect the CPU state at all, except the CPU
has to be running in order to handle the DMA grant.
Received on Tue Feb 24 1998 - 18:21:24 GMT
This archive was generated by hypermail 2.3.0
: Fri Oct 10 2014 - 23:30:54 BST