>Eric Smith wrote:
> Someone wrote:
> > What machines have had bit pointers?
>
> Allison replied:
> > 8051. There may be others.
>
> Bear in mind that on the 8051, bit operations could only be done on
> certain specific bits of the internal register file. It didn't have true
> bit pointers, so you couldn't do arithmetic on the pointers. And they
> could only be used for single bits, not bit fields.
>
> Aside from the PDP-10, the IBM Stretch (7030) and the TI 34010 and 34020
> graphics processors had fully general bit addressing. The Stretch did
> require floating point operands to be 64-bit aligned and instructions to
> be 32-bit aligned. I don't think the 340xx had any data alignment
> restrictions; I'm not sure about instruction alignment.
>
> http://www.brouhaha.com/~eric/retrocomputing/stretch/
>
> Some unrelated stories about word alignement and virtual memory:
>
> The 68K family generally required that instructions be aligned; before
> the 68020 16-bit and 32-bit data was also required to be aligned. Otherwise
> an address error exception occurred.
Jerome Fine replies:
While I don't believe that a "STAR 100" from Control Data Corporation
(CDC) will even be available for hobby users - it weighed many tonnes
and needed external cooling (if I remember correctly - likely only water),
it was a system which was likely the fastest and largest at the time - back
in 1972. I think it also used core memory. And the cost was about
$ US 10 Million. All of that is very hazy after 25 years.
The key aspect which I am responding to is that the instruction set was
based on a 64 bit word (8 bytes) many of which used only a half word
and maybe a few might have used only a quarter word (2 bytes).
The registers - there were 256 of 64 bits each were normally split
into a count (16 bits) and an address (48 bits) when used to reference
memory. Of course, the registers could also be integers or floating point
values.
Now the aspect of interest to this post. The addresses were specified
down to the bit level - all 256 Trillion Bits of address or 32 Trillion Bytes.
There were a number of instructions which were able to manipulate single
bits - OR, AND, XOR, etc. I can't remember the exact details after
25 years, but I do remember (rarely) making use of the bit instructions
when certain aspects of the paging algorithms were required.
The point is well taken about what the full word (64 bits) instructions
did if the data was not aligned on a 64 bit address - I can't remember.
The instructions did have to be aligned on at least a byte boundary
and if the minimum size was 2 bytes and the others were 4 bytes
and 8 bytes (no odd number of bytes), then the alignment required
for instructions was probably at the 16 bit level. Also, the instructions
were always executed out of a READ-ONLY area of memory.
One other interesting aspect is that by convention, the OS assumed
that all of the top half of virtual memory belonged to the OS. Another
is that the hardware was the child of Seymore Cray.
Sadly, I probably no longer even have a manual for the instruction set.
Incidentally, a quick quiz. Assuming all the virtual address space was
physical memory and you wanted to make a copy onto a disk drive
(32 Trillion Bytes - we didn't even have GigaBytes back in 1972, let alone
TeraBytes), how long would a sustained WRITE at 1 MByte/second take?
Hint: Answer should be in ONE digit of precision along with a time interval.
Eager beavers who want to give us 8 significant figures of precision
are disqualified.
Sincerely yours,
Jerome Fine
Received on Mon Oct 26 1998 - 07:52:27 GMT