stepping machanism of Apple Disk ][ drive (was Re: Heatkit 51/4 floppies)

From: Allison J Parent <allisonp_at_world.std.com>
Date: Sat Apr 10 18:51:26 1999

<I knew somebody woudl come up with a good example. That 6809 code is
<probably the closest thing I've seen in a micro. The 8051 uses a similar
<approach, pointing to the table with the datapointer and uses the

The 8051 is very ugly in other places.

Then there are the NEC uPD 78xx series that are similar in register layout
to z80 but code wise, not close. They have a table lookup instructions for
that exact task. They are targetted as rom based controllers and code
efficientcy is a requirement but often controller don't need to preocess
the kinds of things a PC (or other general purpose computer) would.

The z280 has a load address inscrtuction that makes the setup for an indexed
jump easier.

The PDP-11 did it on one instuction but it has some very powerful addressing
modes. Indirection and indexing are natural to that part.

However in CPUs righer in register than the 6502, the task would be done
far differently. It's a different programming style and it does impact
code structure. For example a set of operations that can be done requiring
multiple (say a dozen) 16bit parameters to be passed are easily done on
even 8080 but the 6502 has to do that as indexed list in ram and pass
the pointer to the list if you want to be efficient. It's possible to
structure a problem such that any cpu looks good or bad. Generally an
application is far more than a trivial few instructions.

Look at the PDP-8 which is both register poor and has an instruction set
that small is far from adaquate to describe. Yet it performs tasks
efficiently in small amounts of core that some cpus can't.

The 6809 example would be in PDP-8...
  
                  / enter here with uart data
  DCA pindex / store index value at pindex
  JMP I,INDEX / indirect jump via index (could have been a JMS, jump
                 / subroutine!)

Execution time for an 8E (1973) would have been under 8uS if both instuction
used indirect addressing. As written it would be 7.6uS. Now the 6502 at
2mhz would have done it in what?

< They (DEC) did make the uVax-II as a chipset for interfacing to their
<BI-bus, I believe, so that might qualify as well. The DEC chipset probabl
<didn't sell for what a 6809 costs, even the faster part, and certainly not
<the $0.86 I last saw on the 4MHz Rockwell 65C02.

?????? UvaxII was not for interfacing the BI, that was a dedicated chipset.
The uVAXII was a single chip (extended FPU and DMA were companions). UvaxII
was only remotely related to BI bus. The statment doesn't parse.

<I'm not surprised that it was in the 6809 that this instruction came up.
<The 6809 showed lots of promise at first, but once it was in hand, one
<clearly could see that it would be MUCH easier going with the MC68008 if on
<had to use an 8-bit bus. I never had the opportunity to write in a

the 6809 was a bridge part while waiting for the 68K. Still it was a good
part.

<high-level language for the 6809, but I was told it should have been quite
<easy to write a high-quality efficient compiler for it because of its
<repertioire of instructions and addressing modes. I turned out literally

Nearly as good as the PDP-11. FYI both the 6809 and the 68k had heavy
PDP-11 and vax influences.


Allison
Received on Sat Apr 10 1999 - 18:51:26 BST

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