I have to disagree with your comparison of the 2 MHz 6502 with a 4 MHz
Z-80A. My thought here is that the 4MHz Z-80 used in the conventional way,
had a memory cycle of 750 nanoseconds (3 clock ticks), while the 6502, at
whatever rate, again, used in the conventional way, had a memory cycle of
one clock tick. Now, some instructions involve several memory cycles, but
that was true of both processor families. What I often cursed, was that the
textbook application of the 650x core left memory available (idle) half the
time. That was a blessing up to a point (2.5 MHz to be exact) because it
allowed for DRAM "RAS-precharge." The Apple and others like it proved that
at around 1 MHz, the 6502's memory could be used for an entirely separate
purpose, e.g. video refresh.
At one point in time, I went to some lengths to demonstrate the relative
performance capability, based on common applications, when the processors
were placed in an environment in which the primary constraint on the
processor's performance, hardware-wise, was the memory bandwidth. It turned
out to be a rather difficult comparison, because of the lengths to which one
had to go in order to utilize the memory bandwidth most effectively. The
Z-80's most difficult aspect was that its memory cycles were of different
lengths.
The 6502 could be interfaced quite easily by using an asymmetrical clock,
with a short Phase-1 (the period during which addresses and control signals
change) and a relatively long Phase-2, which is the cycle when I/O to
off-chip system-resources take place. This was straightforward until the
system design was adjusted for DRAMs, which were the most common problem of
that time. Both processors had problems with DRAM usage. The 6502, when
its clock was tweaked to make DRAM access most time-efficient required,
absolutely, that a cycle-stealing arrangement was used in order to support
refresh. This meant extra hardware.
However, the otherwise minimalist Z-80, which once was touted as supporting
DRAMs by generating a refresh cycle from time to time, required extra
hardware to modify its clock as well in order to allow for a long enough M1
cycle, and to allow enough time for the refresh to occur during its
allocated window. This meant even more hardware.
It turned out that all the things which the processors' designers had done
in order to make the two chips "efficient" became a problem when I tried to
implement each one in a way which was tailored to attain the most effective
utilization from what was then the most costly system resource, the main
memory.
In any case, what I determined was that the Z-80, in spite of its
complicated hardware requirement, was potentially the faster processor.
This was based on a comparison of the two in what I then considered an
application tailored to the most effective use of memory bandwidth. I also
quickly concluded that the 6502 would outperform it in an application where
memory demand was small enough to allow the use of SRAMS, because if the
fastest Z-80 available at the time (1981) was handed memories fast enough to
operate it at full speed with no wait-states, i.e. minimal hardware, the M1
cycle was still so short as to use the normal Phase-1 time of a 4 MHz 6502,
the memory cycle of which was a single clock tick as opposed to the Z-80's
three.
I believe there are entirely too many subjective, architecture-related,
factors to allow an absolute comparison/contrast of the two processors.
Being mostly a hardware-oriented type, I find the analysis adequate to
warrant the second conclusion above, though I've never been entirely
satisfied with the comparison I made based on their relative speed in the
execution of a BASIC program. The BASIC interpreters were different, and
the programs had to be "fiddled-with" in order to make them both run. The
difference was not overwhelming, so I've never been entirely comfortable
with the concusion. In my "gut" I still believe the 4 MHz Z-80 is about
comparable to a 1.5 MHz 6502.
Back in 1980, the Z-80 was definitely the wisest choice if you had to settle
on a single processor for carrying out useful business tasks, because the
Z-80 could run CP/M which had LOTS of such "useful" programs, thoroughly
debugged, most of which were entirely suitable for commercial use, and there
were significantly fewer useful-work programs for the 6502, which was more
popular in graphics-oriented systems because it could share its memory and
because its instruction set was apparently better suited for moving icons
around in a display memory as most game programs required.
Dick
-----Original Message-----
From: Pete Turnbull <pete_at_dunnington.u-net.com>
To: Discussion re-collecting of classic computers
<classiccmp_at_u.washington.edu>
Date: Sunday, April 11, 1999 8:35 AM
Subject: Re: stepping machanism of Apple Disk ][ drive (was Re: Heatkit 51/4
floppies)
>On Apr 11, 9:16, Allison J Parent wrote:
>
>> The point was apparently missed. Of course I can take a cmos z80 and
>blow
>> that out of the water using a 6 or 8 mhz clock.
>
>But because of the way the phases are used, a 2MHz 6502/65C02 is running at
>roughly the same rate (for comparable operations) as a 4MHz Z80.
>
>--
>
>Pete Peter Turnbull
> Dept. of Computer Science
> University of York
Received on Sun Apr 11 1999 - 11:20:09 BST