z80 timing... 6502 timing

From: Richard Erlacher <edick_at_idcomm.com>
Date: Sat Apr 17 13:38:37 1999

As I recall, all the undocumented operations have the two ls bits set. Is
that correct? Maybe I should add them to my assembler/debugger.

The one I routinely hear about the Z-80 is one which places the odd parity
of the bytes (or maybe the lsb's of the bytes) in a block moved with an LDIR
or INIR instruction into the carry or some such. This instruction is
supposed to leave carry unaffected, but doesn't.

Dick

-----Original Message-----
From: Hans Franke <Hans.Franke_at_mch20.sbs.de>
To: Discussion re-collecting of classic computers
<classiccmp_at_u.washington.edu>
Date: Saturday, April 17, 1999 10:15 AM
Subject: Re: z80 timing... 6502 timing


>> Were you aware of the neat little opcodes that were built into the 6502?
I
>> don't have my list of them any more, but back in the KIM days, there were
>> several lists in circulation. As I recall, one of them was a double
load,
>> i.e it loaded a value into both a register and the accumulator. I
believe
>> another loaded a register and pushed the value on the stack at the same
>> time. Esoteric, for sure, but you never know . . .
>
>Like SHIFT&OR (0F,1F,1B,...), ROL&AND (2F,3F,3B,...), LSR&XOR
($F,5F,5B,...),
>ROR&ADD (6F,7F,7B,...) etc ... most are realy exotic and save only a second
>instruction, but some could have been a big help, if they had been official
>(like AND A,X and STORE, without changing A or X - saving up to 4
instructions,
>or LOAD A&X, or AND MEM&X/MEM&Y). Some are more or less useles, like the
STOP
>(halts execution, only reset will wake up the CPU) or just longer NOPs (two
and
>tree cycles).
>
>THe 65xx stuff is quite known, but what has been new to my ears are the
>8085 'hidden' operations.
>
>Gruss
>H.
>
>--
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Received on Sat Apr 17 1999 - 13:38:37 BST

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