Qbus slot ordering?

From: allisonp_at_world.std.com <(allisonp_at_world.std.com)>
Date: Wed Dec 15 07:36:35 1999

> FWIW, the DZV11 was apparently already set up to be the "first" one (I
> stuck it in and did a show QBUS and there it was). That saved me from
> having to figure out the switch settings. And so far it seems to not be
> interfering with the operation of the system.
>
> --Chuck


For vax and PDP-11 QBUS systems there are recommended addresses for cards
and some ordering rules but none are that hard and fast.

Generally Qbus ordering:

 CPU
 Memory (if PMI)
 DEQNA/DELQA (NI)
 TK50(streaming tapes)
 DL lines (unbuffered)
 DUV/DHV/DZV (muxes and buffered serial)
 RQDXn (MSCP disks)

The pattern should be obvious. Devices with the highest throughput or
processing demand are nearest the cpu and low/slow demand devices further
away. Memory has to be next to the CPU if PMI due to the over the top
cable if QBUS (usually only PDP11) it can be at the end of the bus.

 The addresses are in the varios PDP-11 and vax manuals and usually list
 primary and secondary addresses (and vectors if not "floating").

 Allison
Received on Wed Dec 15 1999 - 07:36:35 GMT