More Bringing up a CPM

From: Dwight Elvey <elvey_at_hal.com>
Date: Tue Jun 1 19:01:49 1999

"Richard Erlacher" <edick_at_idcomm.com> wrote:
--snip--
> Have you examined the nRAS nWE and nCAS signals to the DRAM
> with your 'scope?

 Thanks Richard, this sounds like a good place to look.

> Where does this DMA live? Is this an i8257 on the
> controller?

 The DMA controller is all TTL, with no special controller
chip. Like I said, it is an early unit made about '77 or
so. The entire sequence is completely controlled by 2
bipolar PROMs that are part of the controllers sequencer
and a few flip-flops to deal with the DMA acknowledge sequence.
It has been fun figuring this out to understand how to
setup data for formatting ( different than read/write ).
I'll have to look more at what and when the various
signals are generated on the bus relative to the DRAM's
signals.
 I'm just not sure which direction to go from here. Should
I debug the DRAMs or look for the problem in my static
RAMs. Since I need a full boat of 64K and I have no more
static boards to put into it, I'll need to deal with what
I have.
 I still have other issues to fix, like bad
select signals going to the drive ( I can only hook up
one right now ) and flaky RAMs. I have so far replaced
4 IC's and one capacitor to get this far.
Dwight
Received on Tue Jun 01 1999 - 19:01:49 BST